Customization: | Available |
---|---|
Application: | Data Transmission |
Cover Material: | PVC |
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Hot-pluggable QSFP-DD form factor
Transmission data rate up to 53Gbps per channel
8x53Gbps PAM4 transmitter and PAM4 receiver
8 channels 850nm VCSEL array
8 channels PIN photo detector array
Power consumption < 12W per end
CMIS V5.1 compliant
Operating case temperature: 0ºC~+70ºC
RoHS6 compliant (lead free)
400GBASE SR8 Ethernet
The TSDSD-85M-XXXC is an 8-Channel, Pluggable, Parallel, Fiber-Optic QSFP Double Density for Ethernet Applications. This AOC is a high performances module for short-range multi-lane data communication and interconnect applications. It integrates eight data lanes in each direction with 8x26.5625GBd. Each lane can operate at 53.125Gbps up to 70 m using OM3 fiber or 100 m using OM4 fiber with FEC. These modules are designed to operate over multimode fiber systems using a nominal wavelength of 850nm. The electrical interface uses a 76 contacts edge type connector.
Absolute maximum ratings
These values represent the damage threshold of the module. Stress in excess of any of the individual Absolute Maximum Ratings can cause immediate catastrophic damage to the module even if all other parameters are within Recommended Operating Conditions.
Parameters | Symbol | Min. | Max. | Unit | Ref. |
Power Supply Voltage | VCC | -0.5 | +3.6 | V | - |
Storage Temperature | Tc | -40 | +85 | °C | - |
Relative Humidity | RH | 15 | 85 | % | 1 |
Parameter | Symbol | Min | Typical | Max | Unit | Ref. |
Power Supply Voltage | VCC | 3.15 | 3.30 | 3.45 | V | - |
Operating Case Temperature | Tca | 0 | - | 70 | °C | - |
Parameter | Symbol | Min. | Typical | Max | Unit | Ref. |
Differential Input Voltage Amplitude | Vin | 300 | - | 1100 | mV | 1 |
Differential Output Voltage Amplitude | Vout | 300 | - | 900 | mV | 2 |
Signaling rate per lane | DR | 26.5625± 100 ppm | GBd | - | ||
Differential termination mismatch | - | - | - | 10 | % | - |
Skew | - | - | - | 300 | ps | - |
Bit Error Rate | BER | - | - | 2.4E-4 | - | 3 |
Input Logic Level High | VIH | 2.0 | - | VCC | V | - |
Input Logic Level Low | VIL | 0 | - | 0.8 | V | - |
Output Logic Level High | VOH | VCC-0.5 | - | VCC | V | - |
Output Logic Level Low | VOL | 0 | - | 0.4 | V | - |
Notes:
1. Differential input voltage amplitude is measured between TxnP and TxnN
2. Differential output voltage amplitude is measured between RxnP and RxnN.
3. BER=2.4E-4; [email protected]. Pre-FEC
Please visit T&S Communications Co., Ltd. website for more information.